When the simulation is run, there are certain error conditions that will prevent simulation from running. The errors that will prevent simulation from running are:
The master chip clocks are not correctly configured.
All of a CAMs input contacts are not connected to correct voltage sources.
The following shows an error message from the simulator indicating that a CAM input is not correct. This is an error that will prevent the simulator from running.
The following shows that there are multiple chips, and the clock on one chip does not divide evenly into the fastest clock present in the circuit:
The message below arises due to a limitation of the simulator. Certain CAMs feed their input directly to their output without any delay, i.e., the input and the output both occur immediately on the same clock pulse. The simulator cannot currently handle this situation. Insertion of a sample and hold in series with the loop will allow the simulation to proceed but the sample and hold is NOT actually required by the circuit, i.e., if you test the circuit on the bench, it will work properly either with or without the sample and hold.
The CAM documentation for the Inverting Gain Stage, GainInv, says the following:
"This CAM has no additional phase delay due to sampling. The output will change continuously in response to the input so that the output of this CAM is valid during both phases."
If the inverting gain stage output is connected directly to its input, the following simulation error message will be seen:
